Experience

The procedure described in the FADC design flowchart is similar to the procedure followed for the development of the one-channel FADC prototype and is almost identical to the procedure followed by the Washington University technical staff (led by P. Dowkontt) working on other projects. The FADC/CFD motherboards are 9U$\times$400 mm format VME cards with $\sim$4000 components. The Washington University group has designed a 9U board with 3000 components which is quite similar in complexity and which has been used successfully in a balloon experiment (HEAT). As for the FADC boards, Avid Technologies did the layout, Sovereign manufactured the PCBs, and Libra Industries stuffed these boards.

The Washington University technical group also developed space-qualified electronics for the readout of image intensifiers on the CRIS instrument on-board the ACE satellite, has developed 6U VME pulse height analysis modules for balloon experiments as well as 3U VME discriminator boards which formed a multi-thousand channel system for MAPMT readout of scintillating fibers at an accelerator run in 1999. The design of the MAPMT discriminator boards also made use of P. Dowkontt, G. Simburger, Avid Technologies, and Libra although a PCB prototyping house (Nashua Circuits) was used for PCB fabrication.

Wiener Plein und Baus Corporation has extensive experience building VME crates for applications in high energy physics.