The telescope electronics are based largely around the VME standard
electronic architecture: a fast VME backplane and distributed
computation performed by local CPUs running a real-time operating
system. Each controller will be connected, using fast, fiber-optic
connections to a local workstation which in turn is connected to a
central high speed switch connected to the central CPU. The central
CPU will perform control and quicklook functions, further data
compression and integration of the distributed data. This system will
operate using cyclic and multi-thread processes, adhering to POSIX
standards where possible in order to maintain future systems
compatibility. Secondary systems to control mount movement and high
voltage generation will be inexpensive Pentium PCs running a UNIX-like
operating system such as LINUX. Again, communication will be via
Ethernet connection. For a telescope readout rate of 1kHz
each telescope is expected to have an average data flow rate of
800kbyte/s, resulting in a 200kbyte/s rate on any VME
backplane. This rate includes real Cherenkov events and spurious background
hits. The VERITAS data acquisition system expects to operate well
within this limiting range.